XC9572XL CPLD Development Board v1b
Development board for the Xilinx XC9572XL CPLD (72 macrocells, 5 V-tolerant inputs, 3.3 V core). Supports schematic entry, Verilog, and VHDL via free Xilinx ISE; programmable via Bus Pirate over JTAG. Designed by Dangerous Prototypes, open source (CC-BY-SA).
Pinout
- VCCType · Power
- GNDType · Ground
- TCK,TMS,TDI,TDOType · Signal
- IOType · Signal
| Pin | Type |
|---|---|
| VCC | Power |
| GND | Ground |
| TCK,TMS,TDI,TDO | Signal |
| IO | Signal |
Pin details
4 connections- VCCPower
- GNDGround
- TCK,TMS,TDI,TDOSignal
- IOSignal
Bare ICs
67 other options74HC logic gates, MCP3008/MCP23017 ADCs and expanders, 24LC256 EEPROM, 4N25-series optocouplers and ULN2803A drivers — bare DIP chips with no breakout-board conveniences like pull-ups or level shifting.
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