Logical pinout · physical placement not verified

2 grouped source records are expanded into separate logical pads where unambiguous; physical placement is not implied.

VIN
Board power input. Source states the onboard regulator accepts 3-5VDC and powers the 3 V sensor chip.
Type · PowerVoltage · 3-5VDC input
3V
3.3V regulator output; source states up to 100mA can be drawn.
Type · PowerVoltage · 3.3V output, up to 100mA
GND
Common ground for power and logic.
Type · GroundVoltage · 0V
SCLSCK
I2C clock pin; also SPI clock input (SCK). Source states I2C side is level shifted for 3-5V logic with 10K pullup.
Type · I2C, SPIVoltage · 3-5V logic on I2C SCL
SDAMOSI
I2C data pin; also SPI serial data in / MOSI from processor to LSM6DS33. Source states I2C side is level shifted for 3-5V logic with 10K pullup.
Type · I2C, SPIVoltage · 3-5V logic on I2C SDA
STEMMA QT
STEMMA QT / Qwiic connector for I2C connections to compatible dev boards or accessories.
Type · Unknown
DOMISO
SPI data out / MISO from the LSM6DS33 to the processor.
Type · SPI, Signal
CS
SPI chip select input; source says pull low to start an SPI transaction.
Type · SPI
DOAD0 jumper
I2C address selection jumper; source states pulling high or bridging the back solder jumper changes address from 0x6A to 0x6B.
Type · Control
INT1
Primary interrupt pin; source says it can be configured to pull low for events such as new measurement data.
Type · Signal
I2INT2
Secondary interrupt pin; source says it can be configured to pull low for events such as new measurement data.
Type · Signal

Pin	Type	Function	Voltage
VIN	Power	Board power input. Source states the onboard regulator accepts 3-5VDC and powers the 3 V sensor chip.	3-5VDC input
3V	Power	3.3V regulator output; source states up to 100mA can be drawn.	3.3V output, up to 100mA
GND	Ground	Common ground for power and logic.	0V
SCLSCK	I2C, SPI	I2C clock pin; also SPI clock input (SCK). Source states I2C side is level shifted for 3-5V logic with 10K pullup.	3-5V logic on I2C SCL
SDAMOSI	I2C, SPI	I2C data pin; also SPI serial data in / MOSI from processor to LSM6DS33. Source states I2C side is level shifted for 3-5V logic with 10K pullup.	3-5V logic on I2C SDA
STEMMA QT	Unknown	STEMMA QT / Qwiic connector for I2C connections to compatible dev boards or accessories.
DOMISO	SPI, Signal	SPI data out / MISO from the LSM6DS33 to the processor.
CS	SPI	SPI chip select input; source says pull low to start an SPI transaction.
DOAD0 jumper	Control	I2C address selection jumper; source states pulling high or bridging the back solder jumper changes address from 0x6A to 0x6B.
INT1	Signal	Primary interrupt pin; source says it can be configured to pull low for events such as new measurement data.
I2INT2	Signal	Secondary interrupt pin; source says it can be configured to pull low for events such as new measurement data.

Logical pinout · physical placement not verified

2 grouped source records are expanded into separate logical pads where unambiguous; physical placement is not implied.

Pin details

11 connections

VIN
Board power input. Source states the onboard regulator accepts 3-5VDC and powers the 3 V sensor chip.
PowerVoltage · 3-5VDC input
3V
3.3V regulator output; source states up to 100mA can be drawn.
PowerVoltage · 3.3V output, up to 100mA
GND
Common ground for power and logic.
GroundVoltage · 0V
SCLSCK
I2C clock pin; also SPI clock input (SCK). Source states I2C side is level shifted for 3-5V logic with 10K pullup.
I2C, SPIVoltage · 3-5V logic on I2C SCL
SDAMOSI
I2C data pin; also SPI serial data in / MOSI from processor to LSM6DS33. Source states I2C side is level shifted for 3-5V logic with 10K pullup.
I2C, SPIVoltage · 3-5V logic on I2C SDA
STEMMA QT
STEMMA QT / Qwiic connector for I2C connections to compatible dev boards or accessories.
Unknown
DOMISO
SPI data out / MISO from the LSM6DS33 to the processor.
SPI, Signal
CS
SPI chip select input; source says pull low to start an SPI transaction.
SPI
DOAD0 jumper
I2C address selection jumper; source states pulling high or bridging the back solder jumper changes address from 0x6A to 0x6B.
Control
INT1
Primary interrupt pin; source says it can be configured to pull low for events such as new measurement data.
Signal
I2INT2
Secondary interrupt pin; source says it can be configured to pull low for events such as new measurement data.
Signal

Start wiring

I2C · SPI · Analog · 3.3 – 5 V · Breakout

Confirm the data interface matches your host board.

Module pins: VIN, 3V, GND, SCL / SCK, SDA / MOSI, DO / MISO, CS, INT1. Schematik maps them to your board in the app.

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