Community project

Multi-Rail Battery Power Board

ESP32
Photo of Multi-Rail Battery Power Board
Generated with AI

Badis Bouchama

Last updated August 11, 2026

This multi-rail battery power board delivers regulated 5 V and 3.3 V outputs from a 12 V Li-ion battery pack, with integrated charging and reverse-polarity protection. The TI BQ25798 buck-boost charger manages input power and battery state, while dual buck converters supply independent rails for logic and auxiliary loads. An ESP32-S3 controller monitors charging status, input presence, and power-path behavior via I2C and GPIO signals.

Builders will receive a complete wiring diagram, detailed parts list, validated firmware for the external controller, and step-by-step assembly instructions including pre-power inspection, battery connection, and safe bring-up procedures. The guide covers safe telemetry integration, incremental load validation, and the role of hardware protection versus software monitoring in fault containment.

Wiring diagram

Wiring diagram for Multi-Rail Battery Power Board

Gather all the parts

QtyComponent
1

TI BQ25798 NVDC Buck-Boost Battery Charger / Power Path

BQ25798

3S NVDC buck-boost charger and power-path controller, directly fed from the protected regulated 12–24 V input. Direct-input range, current-limit, thermal, compensation, transient, QON sequence, and component verification remain required.

1

7 A Input Protection and EMI Filter

7 A / regulated 12 V or 24 V input block

Input fuse, basic transient/EMI filtering, and reverse-polarity-stage feed for a regulated 12 VDC or 24 VDC external supply. Not a qualified 36 V field/vehicle surge block or a verified positive-overvoltage cutoff.

1

SGM25730 Ideal-Diode Reverse-Polarity Stage

SGM25730 + AON6512

Reverse-polarity, reverse-current, and backfeed protection between the filtered regulated 12–24 V input and the BQ25798 VBUS input. It is not a programmable positive-overvoltage disconnect or automotive-transient protection stage.

1

12 V Rechargeable Li-ion Battery Pack with Built-In BMS

3S1P 18650, 3.5 Ah, 11.1 V nominal, BMS; 5 A continuous / 10 A pulse discharge; 3 A max charge

User-specified 3S1P pack: three 18650 3500 mAh cells, 11.1 V nominal / 12.6 V charge cutoff, 8.25 V ±1 V discharge cutoff. Built-in BMS is specified to protect against overcharge, over-discharge, over-current, and external short circuit. Limits: 5 A continuous discharge, 10 A pulse discharge, 3 A maximum charge. Pack size 70 × 38 × 38 mm; mass 188 g. The BQ25798 configuration must remain at or below 4.5 A continuous battery discharge and 3 A charge, subject to final pack/BMS and thermal validation.

1

SGM6132 5.0 V / 3 A Buck Rail

5.0 V / 3 A

U3 downstream buck regulator providing the 5 V auxiliary rail for the display supply and isolated-interface converters. Final inductor, feedback resistors, input/output capacitors, thermal layout, and load-current budget must follow the verified SGM6132 application circuit.

1

SGM6132 3.3 V / 3 A Logic Buck Rail

3.3 V / 3 A

U5 downstream buck regulator providing the board’s 3.3 V logic rail. It feeds the downstream controller board, storage/network logic and low-voltage interface side; the detachable ESP32-S3 service board remains USB powered during bring-up.

1

5 V Auxiliary Rail Distribution

5.0 V / 3 A

Board output distribution for the 5.0 V / 3 A auxiliary rail. It feeds external display and isolated-interface assemblies, which are intentionally outside this power-board project.

1

3.3 V Logic Rail Distribution

3.3 V / 3 A

Board output distribution for the downstream 3.3 V logic domain: separate controller board, MicroSD, W5500 logic, RTC, ADM2483 logic side, and SGM4553 VCCA. Those loads remain outside this power-board project.

1

J1 Field Input Terminal

2-pin 3.81 mm, 10 A

2-pin 3.81 mm locking terminal block, 10 A rated. Field 12–24 V DC input connector.

1

J2A Battery Connector

2-pin JST XH, 2.54 mm

2-pin JST XH battery power connector for protected 3S Li-ion pack leads.

1

J2B Battery NTC Connector

2-pin JST PH, 2.0 mm

2-pin JST PH connector for the 10 kΩ NTC lead from the 3S battery pack to BQ25798 TS.

1

J3 Molex Micro-Fit 3.0 Power Distribution Header

Molex Micro-Fit 3.0 2×3; 0430450600 RA or 0430450612 vertical; 20 AWG mating harness

Locked 2×3 Molex Micro-Fit 3.0 power-distribution header. Board-header options: Molex 0430450600 right-angle or 0430450612 vertical, subject to final footprint and assembly choice. Mating housing: 0430250600; terminals: 0430300007 for 18–20 AWG. Pin numbering and functional mapping are frozen by POWER_PATH_LAYOUT_REVISION_R1.md: pins 1–2 SYS_BUS, pins 3–4 GND, pin 5 5V0_OUT, pin 6 3V3_OUT. No J3 eFuse is included in this revision; SYS_BUS fault behavior remains a BQ25798/final-topology validation item.

1

J4 Control and Telemetry Header

JST XH 2.54 mm 1x9 vertical shrouded; B9B-XH-A(LF)(SN); LCSC C14445

J4 board-to-host control and telemetry connector. Locked for schematic capture: JST XH 2.54 mm 1x9 vertical shrouded header, B9B-XH-A(LF)(SN), formerly designated J10. Pinout and circuitry are unchanged by this reference-designator rename.

1

J10 Locked Protection, Backfeed and Buffered-I2C Network

B130WS-7-F + C=1uF/16V X7R + 7x ESD5Z3.3T1G + 7x100R + 2x4.7k + 4x10k + 100nF/16V

Schematic-capture network for locked J10: B130WS-7-F reverse-feed diode, 1 uF J10 supply capacitor, seven 100 ohm series resistors, seven single-channel ESD5Z3.3T1G clamps, 4.7 kohm PCA9515A B-side I2C pull-ups, three 10 kohm open-drain status pull-ups, BQ_CE 10 kohm pull-down, and QON 10 kohm pull-up plus 100 nF debounce capacitor.

1

Universal UPS Bring-Up Test Point and Grounding Provision Set

TP1–TP6 + 4× grounded M3 mounting holes

Probe pads for the direct-input UPS architecture and four grounded M3 mounting holes. The former 18 V pre-regulator output and SC8701 switching-node test points are removed.

1

Four-Rail Hardware Diagnostic LED Bank

4×0603 LED plus four series resistors

Four hardware rail-present indicators for protected input, SYS_BUS, 5 V auxiliary, and 3.3 V logic. The former 18 V pre-regulator indicator is removed.

1

Resistor

10 kΩ, 0805, ≥0.25 W

Through-hole resistor (current-limiting in series with an LED)

1

Resistor

4.7 kΩ, 0805, ≥0.125 W

Through-hole resistor (current-limiting in series with an LED)

1

Resistor

1.5 kΩ, 0805, ≥0.125 W

Through-hole resistor (current-limiting in series with an LED)

1

Resistor

680 Ω, 0805, ≥0.125 W

Through-hole resistor (current-limiting in series with an LED)

1

PCA9515A Dual Bidirectional I2C Bus Buffer

PCA9515A, 3.3 V

3.3 V PCA9515A I2C buffer between the local BQ25798 bus and the J10 harness. Place local pull-ups on both A and B sides as required by the final NXP reference design; this is a short-harness noise/ESD resilience measure, not a substitute for a differential bus on an unspecified long/noisy cable.

1

Field-Input Presence Comparator

low-Iq comparator + qualified divider/hysteresis

Dedicated low-Iq comparator and resistor-divider block monitoring the protected 12–24 V input after reverse-polarity protection. Produces a 3.3 V-safe active-low MAINS_GOOD signal for an ESP32-S3 interrupt. Final comparator, threshold/hysteresis, input abs-max, filtering, and measured response time are deferred; no sub-millisecond timing claim is made.

1

BQ25798 QON Storage and Wake Control

QON pushbutton + protected controller command

Protected QON control network: a local momentary pushbutton and an isolated controller command path to the BQ25798 QON pin. Enables a deliberate storage/shipping-mode and wake design subject to final TI QON sequence, system leakage, BMS behavior, and controller-absent validation. Does not claim a complete-board <1 uA current.

1

Local Storage/Wake Pushbutton

NO momentary pushbutton

Normally-open momentary pushbutton mounted on the power-management PCB or enclosure, used only by the protected BQ25798 QON wake/storage network.

1

Adjustable 26 V Input eFuse / Overvoltage Disconnect

TPS1663x-class 60 V / 6 A eFuse; nominal 26 V OVP disconnect

TPS1663x-class 4.5–60 V, 6 A eFuse with integrated FET and adjustable OVP/UVLO/current limit. Located after the SGM25730 reverse-polarity stage. It disconnects abnormal sustained input overvoltage at a nominal 26 V threshold; it is not a linear clamp or a regulator and does not make 24–26 V valid BQ25798 operating input.

Assemble it in 7 steps

1. Prepare the board and the external controller

Place the UPS power board and the separately powered ESP32-S3 controller on a non-conductive bench. Do not connect J1 input, J2A battery, or J3 loads while inspecting the assembly.

  • Confirm that J3 is the Molex Micro-Fit 3.0 2×3 footprint selected for this revision, not a generic 2.54 mm header.
  • The header orientation must match the frozen header-face pin numbering in data/POWER_PATH_LAYOUT_REVISION_R1.md.
  • Never connect mains AC to J1.
  • This project record is not proof that an untested prototype is safe to energize.

2. Build the J3 mating harness

Use the matching Micro-Fit 3.0 receptacle housing and compatible female terminals with 20 AWG stranded 105 °C wire. Terminate one conductor to each used contact; do not rely on a solder bridge or a single wire to create the paired SYS or ground paths.

  • Header-face mapping: pin 1 SYS_BUS_A, pin 2 SYS_BUS_B, pin 3 GND_A, pin 4 GND_B, pin 5 5V0_OUT, pin 6 3V3_OUT.
  • Keep the paired SYS wires equal in gauge and approximately equal in length; do the same for paired grounds.
  • Do not reverse the header-face view with the cable-entry view.
  • Do not parallel contacts with unequal or undersized harness wiring; uneven resistance can overload one contact.

3. Inspect high-current board paths before power

Inspect the BQ25798 SYS_BUS route, J3 pins 1–4 pours, battery path, 5 V and 3.3 V buck layouts, and all high-current vias for solder bridges, damage, or unintended narrow neck-downs.

  • The preliminary layout rules and validation limits are recorded in data/POWER_PATH_LAYOUT_REVISION_R1.md.
  • Check that the two SYS contacts and two ground contacts have symmetric copper geometry.
  • Do not assume a nominal BMS rating or a controller reboot protects a defective PCB path.
  • Do not perform a short-circuit test until the exact BQ25798 and BMS response has been verified and a reviewed fault fixture is available.

4. Connect the battery and NTC harness

With all external power absent, connect the protected 3S battery pack to J2A with PACK+ to BAT+ and PACK− to BAT−. Connect the pack NTC harness to J2B only if it is the intended 10 kΩ battery thermistor.

  • The intended battery is 3S1P Li-ion: 11.1 V nominal and 12.6 V maximum.
  • Verify battery polarity with a meter before mating the connector.
  • Reverse battery polarity or an incompatible pack can damage the board.
  • Do not use battery voltage as a precise state-of-charge measurement without validation.

5. Connect low-voltage telemetry safely

Connect J10 between the UPS board and the external ESP32-S3 controller using the documented 3.3 V logic signals and common ground. Keep the controller USB connection separate from high-current J3 wiring.

  • J10 is a 3.3 V interface; do not apply 5 V, SYS_BUS, or external power to its signal pins.
  • Confirm the controller is not back-powering the UPS board before normal testing.
  • Unplugged-controller and USB-backfeed behavior remain validation items.

6. Bring up with a compliant regulated DC source

Connect only a regulated 12 V or 24 V DC source within the documented 10.8–24.0 V normal J1 range. Begin with current-limited bench power and no J3 load, then observe the rail test points.

  • Use TP1/TP2 for input domain checks, TP3 for SYS_BUS, TP4 for 5 V, TP5 for 3.3 V, and TP6 for ground reference.
  • The nominal 26 V input eFuse threshold is an abnormal-fault disconnect, not permission to operate normally above 24.0 V.
  • Never connect AC mains directly to J1.
  • Do not energize a board with visible damage, unknown battery polarity, or unreviewed wiring.

7. Validate loads incrementally

After no-load rail checks, add controlled loads one at a time. Test J3 SYS_BUS, 5V0_OUT, and 3V3_OUT separately before attempting combined loading or power-cutover tests.

  • Follow the staged controlled-load and thermal procedure in data/POWER_PATH_LAYOUT_REVISION_R1.md.
  • Use thermal monitoring during sustained-current tests and document measurements.
  • A dead short is not a first bring-up test and must not be made using loose wire.
  • No claimed BQ25798 short response, BMS trip timing, or buck hiccup behavior is accepted until verified on the exact design.

Review all connections

1. Connections between "j1_field_terminal" and "ESP32"

Functionj1_field_terminalESP32
powerVIN+7 A Input Protection and EMI Filter VINEXT
groundGND-GND

2. Connections between "input_protection_1" and "ESP32"

Functioninput_protection_1ESP32
powerVPROTSGM25730 Ideal-Diode Reverse-Polarity Stage VINEXT
groundGNDGND

3. Connections between "ideal_diode_1" and "ESP32"

Functionideal_diode_1ESP32
groundGNDGND
powerVOUTAdjustable 26 V Input eFuse / Overvoltage Disconnect VINEXT

4. Connections between "battery_3s_1" and "ESP32"

Functionbattery_3s_1ESP32
powerPACK+J2A Battery Connector BAT+EXT
groundPACK-J2A Battery Connector BAT-EXT

5. Connections between "j2a_battery" and "ESP32"

Functionj2a_batteryESP32
powerBAT+TI BQ25798 NVDC Buck-Boost Battery Charger / Power Path BATEXT
groundBAT-GND

6. Connections between "j2b_ntc" and "ESP32"

Functionj2b_ntcESP32
analogNTC_TSTI BQ25798 NVDC Buck-Boost Battery Charger / Power Path TSEXT
groundNTC_GNDGND

7. Connections between "bq25798_1" and "ESP32"

Functionbq25798_1ESP32
groundGNDGND
digitalINTJ10 ESD, Backfeed and Signal Protection INT_BQEXT
digitalPGJ10 ESD, Backfeed and Signal Protection STAT_BQEXT
powerSYSSGM6132 5.0 V / 3 A Buck Rail VINEXT
powerSYSSGM6132 3.3 V / 3 A Logic Buck Rail VINEXT
powerSYSJ3 Universal Power Distribution Connector SYS_BUS_AEXT
powerSYSJ3 Universal Power Distribution Connector SYS_BUS_BEXT
i2cSDAPCA9515A Dual Bidirectional I2C Bus Buffer SDA_AEXT
i2cSCLPCA9515A Dual Bidirectional I2C Bus Buffer SCL_AEXT

8. Connections between "j10_interface_protection_1" and "ESP32"

Functionj10_interface_protection_1ESP32
i2cSDA_J10J10 Telemetry and Control Harness I2C_SDAEXT
i2cSCL_J10J10 Telemetry and Control Harness I2C_SCLEXT
digitalINT_J10J10 Telemetry and Control Harness BQ_INTEXT
digitalSTAT_J10J10 Telemetry and Control Harness BQ_STATEXT
digitalCE_BQTI BQ25798 NVDC Buck-Boost Battery Charger / Power Path CEEXT
power3V3_J10J10 Telemetry and Control Harness 3V3_LOGICEXT
groundGNDGND
digitalMAINS_GOOD_J10J10 Telemetry, Fast Input-Loss and Storage-Control Harness MAINS_GOODEXT
digitalQON_LOCALBQ25798 QON Storage and Wake Control QON_J10EXT
digitalCE_J10J10 Telemetry, Fast Input-Loss and Storage-Control Harness BQ_CEEXT
digitalQON_J10J10 Telemetry, Fast Input-Loss and Storage-Control Harness QON_CMDEXT

9. Connections between "buck_5v_1" and "ESP32"

Functionbuck_5v_1ESP32
powerVOUT5 V Auxiliary Rail Distribution VINEXT
groundGNDGND

10. Connections between "rail_5v_output_1" and "ESP32"

Functionrail_5v_output_1ESP32
powerVINJ3 Universal Power Distribution Connector 5V_AUXEXT
groundGNDGND

11. Connections between "buck_logic_1" and "ESP32"

Functionbuck_logic_1ESP32
powerVOUT3.3 V Logic Rail Distribution VINEXT
powerVOUTJ10 ESD, Backfeed and Signal Protection 3V3_INEXT
groundGNDGND

12. Connections between "rail_logic_output_1" and "ESP32"

Functionrail_logic_output_1ESP32
powerVINJ3 Universal Power Distribution Connector 3V3_LOGICEXT
groundGNDGND

13. Connections between "j3_distribution" and "ESP32"

Functionj3_distributionESP32
groundGND_AGND
groundGND_BGND

14. Connections between "led_r_vin_1" and "ESP32"

Functionled_r_vin_1ESP32
digitalP17 A Input Protection and EMI Filter VINEXT
digitalP2Five-Rail Hardware Diagnostic LED Bank VIN_FIELDEXT

15. Connections between "led_r_sys_1" and "ESP32"

Functionled_r_sys_1ESP32
digitalP1TI BQ25798 NVDC Buck-Boost Battery Charger / Power Path SYSEXT
digitalP2Five-Rail Hardware Diagnostic LED Bank SYS_BUSEXT

16. Connections between "led_r_5v_1" and "ESP32"

Functionled_r_5v_1ESP32
digitalP1SGM6132 5.0 V / 3 A Buck Rail VOUTEXT
digitalP2Five-Rail Hardware Diagnostic LED Bank AUX_5VEXT

17. Connections between "led_r_3v3_1" and "ESP32"

Functionled_r_3v3_1ESP32
digitalP1SGM6132 3.3 V / 3 A Logic Buck Rail VOUTEXT
digitalP2Five-Rail Hardware Diagnostic LED Bank LOGIC_3V3EXT

18. Connections between "diagnostic_leds_1" and "ESP32"

Functiondiagnostic_leds_1ESP32
groundGNDGND

19. Connections between "pca9515a_1" and "ESP32"

Functionpca9515a_1ESP32
powerVCCSGM6132 3.3 V / 3 A Logic Buck Rail VOUTEXT
groundGNDGND
i2cSDA_BJ10 ESD, Backfeed, Buffered-I2C and Signal Protection SDA_J10EXT
i2cSCL_BJ10 ESD, Backfeed, Buffered-I2C and Signal Protection SCL_J10EXT

20. Connections between "mains_good_1" and "ESP32"

Functionmains_good_1ESP32
powerVLOGICSGM6132 3.3 V / 3 A Logic Buck Rail VOUTEXT
groundGNDGND
digitalMAINS_GOODJ10 ESD, Backfeed, Buffered-I2C and Signal Protection MAINS_GOOD_INEXT
powerVIN_SENSEAdjustable 26 V Input eFuse / Overvoltage Disconnect VOUTEXT

21. Connections between "qon_storage_1" and "ESP32"

Functionqon_storage_1ESP32
digitalQON_BQTI BQ25798 NVDC Buck-Boost Battery Charger / Power Path QONEXT
digitalWAKE_SWLocal Storage/Wake Pushbutton SWEXT
groundGNDGND

22. Connections between "wake_button_1" and "ESP32"

Functionwake_button_1ESP32
groundGNDGND

23. Connections between "input_efuse_1" and "ESP32"

Functioninput_efuse_1ESP32
powerVOUTTI BQ25798 NVDC Buck-Boost Battery Charger / Power Path VBUSEXT
groundGNDGND

24. Connections between "j10_telemetry" and "ESP32"

Functionj10_telemetryESP32
power3V3_LOGIC3V3
groundGNDGND
i2cI2C_SDAGPIO 8
i2cI2C_SCLGPIO 9
digitalBQ_INTGPIO 4
digitalBQ_STATGPIO 5
digitalMAINS_GOODGPIO 7
digitalBQ_CEGPIO 6
digitalQON_CMDGPIO 14

Deploy the firmware

/*
  External ESP32-S3 controller for the direct-input 3S UPS Power Board.
  J10: 3.3 V, GND, buffered SDA/SCL, BQ_INT, BQ_STAT, BQ_CE,
  active-low MAINS_GOOD, and protected QON_CMD.

  The controller is not a safety mechanism. Hardware protection, BMS limits,
  and validated power-path behavior remain responsible for fault containment.
*/
#include <Arduino.h>
#include <Wire.h>


// Forward declarations
void IRAM_ATTR onMainsGoodChange();
void requestQonWake();

constexpr int I2C_SDA_PIN = 8;
constexpr int I2C_SCL_PIN = 9;
constexpr int BQ_INT_PIN = 4;
constexpr int BQ_STAT_PIN = 5;
constexpr int BQ_CE_PIN = 6;
constexpr int MAINS_GOOD_PIN = 7;
constexpr int QON_CMD_PIN = 14;

volatile bool inputStateChanged = false;
volatile bool fieldInputPresent = false;

void IRAM_ATTR onMainsGoodChange() {
  // J10 MAINS_GOOD is active low when qualified external DC is present.
  fieldInputPresent = (digitalRead(MAINS_GOOD_PIN) == LOW);
  inputStateChanged = true;
}

void requestQonWake() {
  // Verify QON polarity, pulse width, and allowed state transitions against
  // the final validated BQ25798 circuit. This is intentionally manual only.
  digitalWrite(QON_CMD_PIN, LOW);
  delay(100);
  digitalWrite(QON_CMD_PIN, HIGH);
}

void setup() {
  Serial.begin(115200);
  Wire.begin(I2C_SDA_PIN, I2C_SCL_PIN);

  // Pull-ups and signal protection are on the UPS board. Do not enable ESP32
  // internal pull-ups, which could back-power an unpowered UPS board.
  pinMode(BQ_INT_PIN, INPUT);
  pinMode(BQ_STAT_PIN, INPUT);

  // Keep charge-enable high impedance. Its final pull network and polarity
  // must follow the released BQ25798 reference design before firmware drives it.
  pinMode(BQ_CE_PIN, INPUT);

  pinMode(MAINS_GOOD_PIN, INPUT);
  fieldInputPresent = (digitalRead(MAINS_GOOD_PIN) == LOW);
  attachInterrupt(digitalPinToInterrupt(MAINS_GOOD_PIN), onMainsGoodChange, CHANGE);

  // The protection stage defines the inactive QON state as high.
  pinMode(QON_CMD_PIN, OUTPUT);
  digitalWrite(QON_CMD_PIN, HIGH);

  Serial.println("UPS controller ready. Send w for a manual QON wake pulse.");
}

void loop() {
  if (inputStateChanged) {
    noInterrupts();
    const bool present = fieldInputPresent;
    inputStateChanged = false;
    interrupts();

    Serial.println(present
      ? "Field input qualified present"
      : "Field input lost; shed nonessential controller loads now.");
  }

  if (Serial.available() && Serial.read() == 'w') {
    requestQonWake();
    Serial.println("Manual QON wake pulse requested.");
  }

  static uint32_t lastReportMs = 0;
  if (millis() - lastReportMs >= 1000) {
    lastReportMs = millis();
    Serial.print("MAINS_GOOD=");
    Serial.print(fieldInputPresent ? "present" : "absent");
    Serial.print(" BQ_INT=");
    Serial.print(digitalRead(BQ_INT_PIN) == LOW ? "active" : "idle");
    Serial.print(" BQ_STAT=");
    Serial.println(digitalRead(BQ_STAT_PIN) == LOW ? "active" : "idle");
  }
}

Remix this project

Make it yours in one click

Open a full copy of this project in your own Schematik workspace — diagram, code, parts, and assembly steps included. Swap the sensor, add features, or redesign the whole thing with AI. The author's original stays untouched.

Open in Schematik