
16-channel bidirectional analog/digital multiplexer/demultiplexer. A 4-bit binary address on S0–S3 selects one of 16 I/O channels (Y0–Y15) to connect to the common SIG/Z pin. An active-LOW enable (EN/INH) pin disables all channels when HIGH.
Supply voltage; 3.3V–5V range; use 3.3V for direct ESP32 logic compatibility
Common ground — must be shared with ESP32 ground rail
Address bit 0 — shared with second MUX; driven by one ESP32 GPIO
Address bit 1 — shared with second MUX; driven by one ESP32 GPIO
Address bit 2 — shared with second MUX; driven by one ESP32 GPIO
Address bit 3 — shared with second MUX; driven by one ESP32 GPIO
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Active-LOW enable/inhibit pin — each MUX chip requires its own EN GPIO for independent chip-select; drive LOW to enable, HIGH to disable
Common signal/output pin (also labelled Z or COM); connect to one ESP32 ADC or digital input GPIO per MUX chip; reads the currently selected channel
| Pin | Position | Type | Function | Voltage |
|---|---|---|---|---|
| VCC | power | Supply voltage; 3.3V–5V range; use 3.3V for direct ESP32 logic compatibility | 3.3 | |
| GND | ground | Common ground — must be shared with ESP32 ground rail | ||
| S0 | digital | Address bit 0 — shared with second MUX; driven by one ESP32 GPIO | ||
| S1 | digital | Address bit 1 — shared with second MUX; driven by one ESP32 GPIO | ||
| S2 | digital | Address bit 2 — shared with second MUX; driven by one ESP32 GPIO | ||
| S3 | digital | Address bit 3 — shared with second MUX; driven by one ESP32 GPIO | ||
| EN | digital | Active-LOW enable/inhibit pin — each MUX chip requires its own EN GPIO for independent chip-select; drive LOW to enable, HIGH to disable | ||
| SIG | analog | Common signal/output pin (also labelled Z or COM); connect to one ESP32 ADC or digital input GPIO per MUX chip; reads the currently selected channel |